A 476-gate-count Dynamic Optically Reconfigurable Gate Array VLSI chip in a standard 0.35μm CMOS Technology
نویسندگان
چکیده
High-speed reconfigurable processors have been developed in recent years: they are DAP/DNA chips and DRP chips [1][2]. These devices can be changed from one context to another context at every clock cycle in a few nanoseconds. However, their die size limits the number of reconfiguration contexts of currently available DAP/DNA and DRP chips to 4–16. In contrast, optically reconfigurable gate arrays (ORGAs) [3][4] enable both fast reconfiguration and numerous reconfiguration contexts using an optical holographic memory and optical wide-band reconfiguration connections. Such devices present the possibility of large virtual gate-count VLSIs. However, even though the virtual gate-count is extremely large, a high real gate-count is required to increase the amount of working circuits at any moment. For that reason, we previously proposed a dynamic optical reconfiguration circuit that is the smallest optical reconfiguration circuit among all ORGAs. We continue our development of high-gate-count dynamic ORGAs (DORGAs) [5]. This paper presents a new design of a fabricated 476-gatecount DORGA modified from a previously designed 68-gatecount DORGA [6] using standard 0.35 μm three-metal CMOS process technology.
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Demand for high-speed dynamic reconfiguration of a programmable device is increasing for raising the performance level of such devices. To support high-speed dynamic reconfiguration, optically reconfigurable gate arrays (ORGAs) have been developed. An ORGA consists of a holographic memory, a laser array, and an optically reconfigurable gate array VLSI. The holographic memory can store many conf...
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